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[Other resourcepassword_lock

Description: 这是使用VHDL语言编写的密码锁程序,供大家参考-This is the use of the VHDL code lock preparation procedures for reference
Platform: | Size: 308665 | Author: 黄鹏飞 | Hits:

[Other resourcejiaotongdengcodes

Description: 实例制作的一个有关交通灯的VHDL代码,从各模块到顶层文件的代码一一列出,详细周到,附带仿真波形图和芯片管脚锁定的相关内容,绝对物超所值。-produced an example of the traffic light VHDL code, from the module to the top of the document sets out a code on January 1, thoughtful details, fringe simulation waveform map and Chip lock the relevant content absolute value for money.
Platform: | Size: 151936 | Author: 潘世雄 | Hits:

[VHDL-FPGA-Verilogpassword_lock

Description: 这是使用VHDL语言编写的密码锁程序,供大家参考-This is the use of the VHDL code lock preparation procedures for reference
Platform: | Size: 308224 | Author: 黄鹏飞 | Hits:

[Otherabcdefghijk

Description: 这是一个数字密码锁的VHDL源代码 花了很多时间才弄来的-This a digital code lock VHDL source code spent a lot of time obtained
Platform: | Size: 2048 | Author: 星星 | Hits:

[VHDL-FPGA-Verilog7064

Description: vhdl代码写的一个密码锁程序,用EPM7064SLC44-10就可以实现-vhdl code written in a code lock procedures used EPM7064SLC44-10 can be achieved
Platform: | Size: 119808 | Author: w w w | Hits:

[VHDL-FPGA-Verilogjiaotongdengcodes

Description: 实例制作的一个有关交通灯的VHDL代码,从各模块到顶层文件的代码一一列出,详细周到,附带仿真波形图和芯片管脚锁定的相关内容,绝对物超所值。-produced an example of the traffic light VHDL code, from the module to the top of the document sets out a code on January 1, thoughtful details, fringe simulation waveform map and Chip lock the relevant content absolute value for money.
Platform: | Size: 151552 | Author: 潘世雄 | Hits:

[VHDL-FPGA-Verilogelec_lock

Description: 本程序是用VHDL语言实现电子密码锁功能,整个系统分为三大模块,一为控制模块,二为键盘显示模块,三为处理模块-This procedure is a VHDL language electronic code lock function, the entire system is divided into three modules, one for the control module, two for the keyboard display module, three modules for the treatment
Platform: | Size: 269312 | Author: 敬礼 | Hits:

[VHDL-FPGA-Verilogmimasuo

Description: 用VHDL编写的数字密码锁,很实用,喜欢请下载-Prepared using VHDL digital code lock, it is practical, likes to download
Platform: | Size: 2048 | Author: ding | Hits:

[VHDL-FPGA-VerilogLOCK

Description: 以QuatusⅡ为平台,采用VHDL语言实现数字密码锁的功能,可以仿真实现。-To Quatus Ⅱ as a platform, the use of VHDL language digital code lock function, you can realize simulation.
Platform: | Size: 187392 | Author: cheng sonja | Hits:

[VHDL-FPGA-Verilogvhdl

Description: 基于EDA技术的数字密码锁源程序代码,大学实训用的着-EDA-based Digital code lock source code, used by the University Training
Platform: | Size: 7168 | Author: shark | Hits:

[Othercodeloc1k

Description: 实现电子密码锁的各项功能,经过编译和仿真-Electronic code lock of the function, the compiler and simulation
Platform: | Size: 436224 | Author: 何情 | Hits:

[VHDL-FPGA-VerilogElectronicCodeLock

Description: 设计一个通用电子密码锁,具体功能如下:[1]数码输入 [2]数码清除 [3]密码更改 [4]激活电锁 [5]解除电锁-The design of a universal electronic code lock, the specific features are as follows: [1] digital input [2] Digital Clear [3] Password Change [4] to activate electric lock [5] the lifting of electric locks
Platform: | Size: 1024 | Author: 小夏 | Hits:

[VHDL-FPGA-VerilogLMX2347

Description: VHDL code for LMX2347(Phase lock loop)
Platform: | Size: 1024 | Author: praveen kumar | Hits:

[VHDL-FPGA-VerilogVHDL_digital_lock_design

Description: VHDL课程的源代码数字密码锁的设计与实现的实验报告,内附源代码-VHDL source code for the course digital code lock design and implementation of the experimental report, included the source code
Platform: | Size: 4096 | Author: CXJ | Hits:

[OthermimasuoVHDL

Description: 用VHDL语言实现的8位密码锁的设计,适用于毕业设计或课程设计参考!-VHDL language with 8-bit code lock design for graduate design or curriculum design reference!
Platform: | Size: 5120 | Author: 田有林 | Hits:

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